HCS12 datasheet(94/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

6.6 Cycle-by-Cycle Execution

This information is found in the tables at the bottom of each instruction

glossary page. Entries show how many bytes of information are accessed

from different areas of memory during the course of instruction execution.

With this information and knowledge of the type and speed of memory in the

system, a user can determine the execution time for any instruction in any

system.

A single letter code in the column represents a single CPU cycle. Uppercase

letters indicate 16-bit access cycles. There are cycle codes for each

addressing mode variation of each instruction. Simply count code letters to

determine the execution time of an instruction in a best-case system. An

rel9 — Any label or expression that refers to an address that is

within –256 to

+255 locations from the next address after

the last byte of object code for the current instruction.

The assembler will calculate the 9-bit signed offset and

include it in the object code for this instruction. The sign

bit for this 9-bit value is encoded by the assembler as a

bit in the looping postbyte (lb) of one of the loop control

instructions DBEQ, DBNE, IBEQ, IBNE, TBEQ, or

TBNE. The remaining eight bits of the offset are included

as an extra byte of object code.

rel16 — Any label or expression that refers to an address

anywhere in the 64-Kbyte address space. The

assembler will calculate the 16-bit signed offset between

this address and the next address after the last byte of

object code for this instruction and include it in the object

code for this instruction.

trapnum — Any label or expression that evaluates to an 8-bit

number in the range $30–$39 or $40–$FF. Used for

TRAP instruction.

xys — Any one legal register designation for index registers X

or Y or the SP

xysp — Any one legal register designation for index registers X

or Y, the SP, or the PC. The reference point for

PC-relative instructions is the next address after the last

byte of object code for the current instruction.

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