HCS12 datasheet(291/452 Pages) FREESCALE

291 / 452 page

Glossary

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

291

Operation:

(A)

⇒ CCR

Description:

Transfers the logic states of bits [7:0] of accumulator A to the corresponding

bit positions of the CCR. The content of A remains unchanged. The X mask

bit can be cleared as a result of a TAP, but cannot be set if it was cleared

prior to execution of the TAP. If the I bit is cleared, there is a 1-cycle delay

before the system allows interrupt requests. This prevents interrupts from

occurring between instructions in the sequences CLI, WAI and CLI, STOP.

This instruction is accomplished with the TFR A,CCR instruction. For

compatibility with the M68HC11, the mnemonic TAP is translated by the

assembler.

Condition codes take on the value of the corresponding bit of accumulator

A, except that the X mask bit cannot change from 0 to 1. Software can leave

the X bit set, leave it cleared, or change it from 1 to 0, but it can only be set

by a reset or by recognition of an XIRQ interrupt.

TAP

Transfer from Accumulator A

to Condition Code Register

TAP

CCR Details:

HIN

∆⇓∆∆∆∆∆∆

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

TAP translates to...

TFR A,CCR

INH

B7 02

HCS12 데이터시트(PDF) 291 Page - Freescale Semiconductor, Inc