 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
HCS12 데이터시트(PDF) 110 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
HCS12 데이터시트(HTML) 110 Page - Freescale Semiconductor, Inc |
|
|
110 / 452 page  S12CPUV2 Reference Manual, Rev. 4.0 110 Freescale Semiconductor Operation: (CCR) • (Mask) ⇒ CCR Description: Performs bitwise logical AND between the content of a mask operand and the content of the CCR. The result is placed in the CCR. After the operation is performed, each bit of the CCR is the result of a logical AND with the corresponding bits of the mask. To clear CCR bits, clear the corresponding mask bits. CCR bits that correspond to ones in the mask are not changed by the ANDCC operation. If the I mask bit is cleared, there is a 1-cycle delay before the system allows interrupt requests. This prevents interrupts from occurring between instructions in the sequences CLI, WAI and CLI, STOP (CLI is equivalent to ANDCC #$EF). Condition code bits are cleared if the corresponding bit was 0 before the operation or if the corresponding bit in the mask is 0. ANDCC Logical AND CCR with Mask ANDCC CCR Details: S X HIN Z V C ⇓⇓⇓⇓⇓⇓⇓⇓ Source Form Address Mode Object Code Access Detail HCS12 M68HC12 ANDCC #opr8i IMM 10 ii P P |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
