HCS12 datasheet(119/452 Pages) FREESCALE

119 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

119

Operation:

(M)

• (Mask) ⇒ M

Description:

Clears bits in location M. To clear a bit, set the corresponding bit in the mask

byte. Bits in M that correspond to 0s in the mask byte are not changed. Mask

bytes can be located at PC + 2, PC + 3, or PC + 4, depending on addressing

mode used.

BCLR

Clear Bits in Memory

BCLR

CCR Details:

HIN

––––

∆∆

–

N: Set if MSB of result is set; cleared otherwise

Z: Set if result is $00; cleared otherwise

V: 0; cleared

Source Form

Address

Mode(1)

1. Indirect forms of indexed addressing cannot be used with this instruction.

Object Code

Access Detail

HCS12

M68HC12

BCLR opr8a, msk8

BCLR opr16a, msk8

BCLR oprx0_xysp, msk8

BCLR oprx9,xysp, msk8

BCLR oprx16,xysp, msk8

DIR

EXT

IDX

IDX1

IDX2

4D dd mm

1D hh ll mm

0D xb mm

0D xb ff mm

0D xb ee ff mm

rPwO

rPwP

rPwO

rPwP

frPwPO

rPOw

rPPw

rPOw

rPwP

frPwOP

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