HCS12 datasheet(128/452 Pages) FREESCALE

128 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

128

Freescale Semiconductor

Operation:

(B)

• (M)

Description:

Performs bitwise logical AND on the content of accumulator B and the

content of memory location M and modifies the condition codes accordingly.

Each bit of the result is the logical AND of the corresponding bits of the

accumulator and the memory location. Neither the content of the

accumulator nor the content of the memory location is affected.

BITB

Bit Test B

BITB

CCR Details:

HIN

––––

∆∆

–

N: Set if MSB of result is set; cleared otherwise

Z: Set if result is $00; cleared otherwise

V: 0; cleared

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

BITB #opr8i

BITB opr8a

BITB opr16a

BITB oprx0_xysp

BITB oprx9,xysp

BITB oprx16,xysp

BITB [D,xysp]

BITB [oprx16,xysp]

IMM

DIR

EXT

IDX

IDX1

IDX2

[D,IDX]

[IDX2]

C5 ii

D5 dd

F5 hh ll

E5 xb

E5 xb ff

E5 xb ee ff

E5 xb

E5 xb ee ff

rPf

rPO

rPf

rPO

frPP

fIfrPf

fIPrPf

rfP

rOP

rfP

rPO

frPP

fIfrfP

fIPrfP

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