HCS12 datasheet(162/452 Pages) FREESCALE

162 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

162

Freescale Semiconductor

Operation:

(Counter) – 1

⇒ Counter

If (Counter) = 0, then (PC)

+ $0003 + Rel ⇒ PC

Description:

Subtract one from the specified counter register A, B, D, X, Y, or SP. If the

counter register has reached zero, execute a branch to the specified relative

destination. The DBEQ instruction is encoded into three bytes of machine

code including the 9-bit relative offset (–256 to

+255 locations from the start

of the next instruction).

IBEQ and TBEQ instructions are similar to DBEQ except that the counter is

incremented or tested rather than being decremented. Bits 7 and 6 of the

instruction postbyte are used to determine which operation is to be

performed.

DBEQ

Decrement and Branch if Equal to Zero

DBEQ

CCR Details:

HIN

––––––––

Source Form

Address

Mode

Object Code(1)

Access Detail

HCS12

M68HC12

DBEQ abdxys, rel9

REL

04 lb rr

PPP/PPO

PPP

1. Encoding for lb is summarized in the following table. Bit 3 is not used (don’t care), bit 5 selects branch on zero

(DBEQ – 0) or not zero (DBNE – 1) versions, and bit 4 is the sign bit of the 9-bit relative offset. Bits 7 and 6 would be 0:0

for DBEQ.

Count

Bits 2:0

Source Form

Object Code

(If Offset is Positive)

Object Code

(If Offset is Negative)

000

001

DBEQ A, rel9

DBEQ B, rel9

04 00 rr

04 01 rr

04 10 rr

04 11 rr

100

101

110

111

DBEQ D, rel9

DBEQ X, rel9

DBEQ Y, rel9

DBEQ SP, rel9

04 04 rr

04 05 rr

04 06 rr

04 07 rr

04 14 rr

04 15 rr

04 16 rr

04 17 rr

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