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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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68HC05CL48 데이터시트(PDF) 21 Page - Motorola, Inc |
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68HC05CL48 데이터시트(HTML) 21 Page - Motorola, Inc |
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21 / 145 page  June 11, 1997 GENERAL RELEASE SPECIFICATION MC68HC05CL48 GENERAL DESCRIPTION MOTOROLA REV 2.0 1-9 1.4.17 RT_L This pin should be connected with an external pull-up resistor to vDD. This pin will be pulled low when RDI1 rises above one volt. 1.4.18 RD1, RD2 These inputs are incoming ring qualifiers. 1.4.19 BP0 - BP15 These are the back plane drivers dedicated to the LCD subsystem. BP8 - BP15 will be used as FP45 - FP52 when the LCD driver is only driving 8 back planes. 1.4.20 FP0 - FP44 These are the front plane drivers dedicated to the LCD subsystem. 1.4.21 VLCD, V0, V1, V2, V3, V4 VLCD is the power supply input for the LCD voltage generator. V0, V1, V2, V3 and V4 are the internal resistor ladder node voltage. An external cap with one terminal connected to GND should be connected to each of these four pins. 1.4.22 XFC One terminal of the Phase-Locked Loop external capacitor should be connected here, the other terminal should be connected to GND. XFC 0.1uF Phase-Locked Loop External Capacitor |
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