PC912XDP512F0MFVR datasheet(88/1348 Pages) FREESCALE

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Chapter 2 Clocks and Reset Generator (S12CRGV6)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

2.3.2.5

CRG Interrupt Enable Register (CRGINT)

This register enables CRG interrupt requests.

Read: Anytime

Write: Anytime

76543210

RTIE

ILAF

LOCKIE

SCMIE

Reset

000000

1. ILAF is set to 1 when an illegal address reset occurs. Unaffected by system reset. Cleared by power on or low

voltage reset.

= Unimplemented or Reserved

Figure 2-8. CRG Interrupt Enable Register (CRGINT)

Table 2-3. CRGINT Field Descriptions

Field

Description

RTIE

Real Time Interrupt Enable Bit

0 Interrupt requests from RTI are disabled.

1 Interrupt will be requested whenever RTIF is set.

ILAF

Illegal Address Reset Flag — ILAF is set to 1 when an illegal address reset occurs. Refer to S12XMMC Block

Guide for details. This ﬂag can only be cleared by writing a 1. Writing a 0 has no effect.

0 Illegal address reset has not occurred.

1 Illegal address reset has occurred.

LOCKIE

Lock Interrupt Enable Bit

0 LOCK interrupt requests are disabled.

1 Interrupt will be requested whenever LOCKIF is set.

SCMIE

Self ClockMmode Interrupt Enable Bit

0 SCM interrupt requests are disabled.

1 Interrupt will be requested whenever SCMIF is set.

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