910GL datasheet(166/426 Pages) INTEL

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Host-PCI Express* Bridge Registers (D1:F0)

(Intel® 82915G/82915P/82915PL Only)

166

Datasheet

8.1.51

VC0RSTS—VC0 Resource Status (D1:F0)

PCI Device:

Address Offset:

11Ah

Default Value:

0000h

Access:

Size:

16 bits

This register reports the Virtual Channel specific status.

Bit

Access &

Default

Description

15:2

Reserved

VC0 Negotiation Pending

0 = The VC negotiation is complete.

1 = The VC resource is still in the process of negotiation (initialization or

disabling).

This bit indicates the status of the process of Flow Control initialization. It is set by

default on Reset, as well as whenever the corresponding Virtual Channel is

Disabled or the Link is in the DL_Down state. It is cleared when the link

successfully exits the FC_INIT2 state

Before using a Virtual Channel, software must check whether the VC Negotiation

Pending fields for that Virtual Channel are cleared in both Components on a Link.

Reserved

8.1.52

VC1RCAP—VC1 Resource Capability (D1:F0)

PCI Device:

Address Offset:

11Ch

Default Value:

00008000h

Access:

Size:

32 bits

Bit

Access &

Default

Description

31:16

Reserved

Reject Snoop Transactions

0 = Transactions with or without the No Snoop bit set within the TLP header are

allowed on this VC.

1 = Any transaction without the No Snoop bit set within the TLP header will be

rejected as an Unsupported Request.

14:0

Reserved

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