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910GL 데이터시트(PDF) 264 Page - Intel Corporation

부품명 910GL
상세설명  Express Chipset
PDF  426 Pages
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제조업체  INTEL [Intel Corporation]
홈페이지  http://www.intel.com
Logo INTEL - Intel Corporation

910GL 데이터시트(HTML) 264 Page - Intel Corporation

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Electrical Characteristics
R
264
Datasheet
Symbol
Signal
Group
Parameter
Min
Nom
Max
Unit
Notes
1.5 V PCI Express Interface 1.0a (includes PCI Express and SDVO)
VTX-DIFF P-P
(f)
Differential Peak to Peak
Output Voltage
0.400
—
0.600
V
2
VTX_CM-ACp
(f)
AC Peak Common Mode
Output Voltage
—
—
20
mV
ZTX-DIFF-DC
(f)
DC Differential TX
Impedance
80
100
120
Ohms
VRX-DIFF p-p
(e)
Differential Peak to Peak
Input Voltage
0.175
—
0.600
V
3
VRX_CM-ACp
(e)
AC peak Common Mode
Input Voltage
—
—
150
mV
Clocks, Reset, and Miscellaneous Signals
VIL
(n)
Input Low Voltage
—
—
0.8
V
VIH
(n)
Input High Voltage
2.0
—
—
V
ILEAK
(n)
Input Leakage Current
—
—
±10
µA
CIN
(n)
Input Capacitance
3.0
—
6.0
pF
VIL
(o)
Input Low Voltage
—
0
—
V
VIH
(o)
Input High Voltage
0.660
0.710
0.850
V
VCROSS
(o)
Crossing Voltage
0.45 x (VIH –
VIL)
0.5 x
(VIH – VIL)
0.55 x (VIH –
VIL)
V
VOL
(p)
Output Low Voltage (CMOS
Outputs)
—
—
0.4
V
VOH
(p)
Output High Voltage (CMOS
Outputs)
2.1
—
—
V
IOL
(p)
Output Low Current (CMOS
Outputs)
—
—
1
mA
@VOL_HI max
IOH
(p)
Output High Current (CMOS
Outputs)
-1
—
—
mA
@VOH_HI min
VIL
(p)
Input Low Voltage
—
—
1.1
V
VIH
(p)
Input High Voltage
1.4
—
—
V
ILEAK
(p)
Crossing Voltage
—
—
±10
µA
CIN
(p)
Input Capacitance
3.0
—
6.0
pF
VIL
(n1)
Input Low Voltage
—
—
0.8
V
VIH
(n1)
Input High Voltage
2.0
—
—
V
ILEAK
(n1)
Crossing Voltage
—
—
±100
µA
0<Vin<VCC3_3
CIN
(n1)
Input Capacitance
4.690
—
5.370
pF
NOTES:
1. Determined with 2x (G)MCH DDR/DDR2 Buffer Strength Settings into a 50
Ω to 0.5xVCCSM
(DDR/DDR2) test load.
2. Specified at the measurement point into a timing and voltage compliance test load as shown in
Transmitter compliance eye diagram of PCI-E specification and measured over any 250 consecutive TX
Uls.
3. Specified at the measurement point and measured over any 250 consecutive Uls. The test load shown
in Receiver compliance eye diagram of PCI-E specification should be used as the RX device when
taking measurements.



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