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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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C5NPD0-DS 데이터시트(PDF) 64 Page - Freescale Semiconductor, Inc |
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C5NPD0-DS 데이터시트(HTML) 64 Page - Freescale Semiconductor, Inc |
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64 / 100 page  64 CHAPTER 2: SIGNAL DESCRIPTIONS C5NP JTAG Data Registers The C-5 NP contains the standard internal registers as specified in IEEE 1149.1. These registers are described in Table 31. Boundary Scan Cell Types The C-5 NP boundary scan register contains only two cell types. All input cells are observe only cells of type BC_4. All enable and output cells are standard cells of type BC_1. In IEEE 1149.1-1990 specification, the BC_4 cell is shown in Figure 7 and the BC_1 cell is shown in Figure 8. Figure 7 Observe-Only Cell Table 31 JTAG Internal Register Descriptions REGISTER NAME REGISTER LENGTH DESCRIPTION Bypass 1 Standard JTAG bypass register Boundary 1807 Boundary Scan Register Device Identification 32 Standard JTAG IDCODE Register G1 0 1 1D C1 From System Pin To next cell To System Logic Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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