| 전자부품 데이터시트 검색엔진 |
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C5NPD0-DS 데이터시트(PDF) 89 Page - Freescale Semiconductor, Inc |
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C5NPD0-DS 데이터시트(HTML) 89 Page - Freescale Semiconductor, Inc |
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89 / 100 page ![]() AC Timing Specifications 89 V 04 QMU Timing Specifications The QMU timing specifications are shown in Figure 25 and described in Table 55. Figure 25 QMU Timing Diagram Data (TDn) TD0 - TD63 Table 54 Signal Groups in TLU Timing Diagrams SIGNAL GROUP INCLUDED SIGNALS QCLK Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 QCMDn (output) QDATAn (output) QDATAn (input) Tqc Tqdo Tqdv Tqdz Tqds Tqdh Tqco Table 55 QMU Timing Description SYMBOL PARAMETER MIN TYP MAX UNIT COMMENT Tqc QMU Cycle Time 2 x Tsc 4 x Tsc ns ns 1X Clock Mode 2X Clock Mode Tqco QMU Ctrl Output 1.5 1/2 Tsc + 1.0 Tsc + 1.0 ns 1X Clock Mode 2X Clock Mode Tqds QMU Data Setup 3.1 ns Tqdh QMU Data Hold 1.3 3.5 ns Tqdo QMU Data Output 1.5 1/2 Tsc + 1.0 Tsc + 1.0 ns 1X Clock Mode 2X Clock Mode Tqdz QMU Data Clk to Tri* 1.1 5.5 ns Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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