LE25LB642CT

7. Hardware Data Protection

In order to protect against unintentional writing at power-on, the LE25LB642CT incorporates a power-on reset

function.

8. Software Data Protection

This product eliminates the possibility of unintentional operations by not recognizing commands under the following

conditions.

• When a write command is input and the rising CS edge timing is not in a bus cycle (8CLK units of SCK).

• When the write data is not in 1-byte increments.

• When the status register write command is input for 2bus cycles or more.

No.NA1471-12/14

9. Power-on

In order to protect against unintentional writing, CS must be kept at VDD at power-on. After power-on, the supply

voltage has stabilized at 1.8V or higher, wait for 10

μs (tPU_READ) before inputting the command to start a read

operation. Similarly, wait for 10ms (tPU_WRITE) after the supply voltage has stabilized at 1.8V or higher before

inputting the command to start a write operation.

10. Decoupling Capacitor

A0.1

μF ceramic capacitor must be provided to each device and connected between VDD and VSS in order to ensure

that the device will operate stably.