LE25LB642CT

No.NA1471-3/14

CS = VDD, VIN = VDD or VSS

VDD = 3.6V

3

μA

CMOS standby current

ISB

CS = VDD, VIN = VDD or VSS

VDD = 2.5V

2

μA

Input leakage current

ILI

VIN = VSS to VDD, VDD = VDD max.

-2

2

μA

Output leakage current

ILO

VIN = VSS to VDD, VDD = VDD max.

-2

2

μA

Input low voltage

VIL

VDD = VDD max.

-0.3

0.3VDD

V

Input high voltage

VIH

VDD = VDD min.

0.7VDD

VDD+0.3

V

VOL1

IOL = 2.0mA, VDD = 3.6V

0.4

V

VOL2

IOL = 1.5mA, VDD = 2.5V

0.4

V

Output low voltage

VOL3

IOL = 0.15mA, VDD = 1.8V

0.3

V

VOH1

IOH = -2.0mA, VDD = 3.6V

0.8VDD

V

VOH2

IOH = -0.4mA, VDD = 2.5V

0.8VDD

V

Output high voltage

VOH3

IOH = -0.1mA, VDD = 1.8V

0.8VDD

V

Capacitance at Ta = 25

°C, f = 1.0MHz

Parameter

Symbol

Conditions

min

typ

max

Unit

Output pin capacitance

CDQ

VDQ = 0V

12

pF

Input pin capacitance

CIN

VIN = 0V

6

pF

Note : These parameters are sampled and not 100% tested.

AC Electrical Characteristics

Input pulse level

0.2×VDD to 0.8×VDD

Input pulse rise/fall time

10ns

Output detection voltage

0.5×VDD

Output load

30pF

AC Characteristics (at FCLK = 5MHz)/VDD = 2.5V to 3.6V

Parameter

Symbol

Conditions

min

typ

max

Unit

Clock frequency

FCLK

5

MHz

SCK logic high level pulse width

tCLHI

90

ns

SCK logic low level pulse width

tCLLO

90

ns

Input signal rise/fall time

tRF

1

us

CS setup time

tCSS

90

ns

SCK setup time

tCLS

90

ns

Data setup time

tDS

20

ns

Data hold time

tDH

30

ns

CS hold time

tCSH

90

ns

SCK hold time

tCLH

90

ns

CS standby pulse width

tCPH

90

ns

CS output high impedance time

tCHZ

150

ns

SCK output data time

tV

80

ns

Output data hold time

tHO

0

ns

WP setup time

tWPS

30

ns

WP hold time

tWPH

30

ns

HOLD setup time

tHS

30

ns

HOLD hold time

tHH

30

ns

HOLD output low impedance time

tHLz

50

ns

HOLD output high impedance time

tHHz

100

ns

Write cycle time

tWC

10

ms

SCK output low impedance time

tCLZ

0

ns