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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MMA8652FC 데이터시트(PDF) 22 Page - Freescale Semiconductor, Inc |
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MMA8652FC 데이터시트(HTML) 22 Page - Freescale Semiconductor, Inc |
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22 / 77 page  MMA8652FC Sensors 22 Freescale Semiconductor, Inc. OUT_Z_MSB(1)(2) R 0x05 0x06 0x00 Output — [7:0] are 8 MSBs of 12-bit real-time sample OUT_Z_LSB(1)(2) R 0x06 0x00 Output — [7:4] are 4 LSBs of 12-bit real-time sample Reserved R 0x07 0x08 — — — — — — Reserved. Read return 0x00. F_SETUP(1)((3)) R/W 0x09 0x0A 00000000 0x00 FIFO setup TRIG_CFG(1)(4) R/W 0x0A 0x0B 00000000 0x00 Map of FIFO data capture events SYSMOD(1)(2) R 0x0B 0x0C 00000000 0x00 Current System mode INT_SOURCE(1)(2) R 0x0C 0x0D 00000000 0x00 Interrupt status WHO_AM_I(1) R 0x0D 0x0E 01001010 0x4A Device ID (0x4A) XYZ_DATA_CFG(1)((4)) R/W 0x0E 0x0F 00000000 0x00 Dynamic Range Settings HP_FILTER_CUTOFF(1)(4) R/W 0x0F 0x10 00000000 0x00 High-Pass Filter Selection PL_STATUS(1)(2) R 0x10 0x11 00000000 0x00 Landscape/Portrait orientation status PL_CFG(1)(4) R/W 0x11 0x12 10000000 0x80 Landscape/Portrait configuration. PL_COUNT(1)(3) R/W 0x12 0x13 00000000 0x00 Landscape/Portrait debounce counter PL_BF_ZCOMP(1)(4) R/W 0x13 0x14 01000100 0x44 Back/Front, Z-Lock Trip threshold P_L_THS_REG(1)(4) R/W 0x14 0x15 10000100 0x84 Portrait/Landscape Threshold and Hysteresis FF_MT_CFG(1)(4) R/W 0x15 0x16 00000000 0x00 Freefall/Motion functional block configuration FF_MT_SRC(1)(2) R 0x16 0x17 00000000 0x00 Freefall/Motion event source register FF_MT_THS(1)(3) R/W 0x17 0x18 00000000 0x00 Freefall/Motion threshold register FF_MT_COUNT(1)(3) R/W 0x18 0x19 00000000 0x00 Freefall/Motion debounce counter Reserved R 0x19 0x1A 0x1B 0x1C — — — — — — Reserved. Read return 0x00. TRANSIENT_CFG(1)(4) R/W 0x1D 0x1E 00000000 0x00 Transient functional block configuration TRANSIENT_SRC(1)(2) R 0x1E 0x1F 00000000 0x00 Transient event status register TRANSIENT_THS(1)(3) R/W 0x1F 0x20 00000000 0x00 Transient event threshold TRANSIENT_COUNT(1)(3) R/W 0x20 0x21 00000000 0x00 Transient debounce counter PULSE_CFG(1)(4) R/W 0x21 0x22 00000000 0x00 Pulse enable configuration PULSE_SRC(1)(2) R 0x22 0x23 00000000 0x00 Pulse detection source PULSE_THSX(1)(3) R/W 0x23 0x24 00000000 0x00 X pulse threshold PULSE_THSY(1)(3) R/W 0x24 0x25 00000000 0x00 Y pulse threshold PULSE_THSZ(1)(3) R/W 0x25 0x26 00000000 0x00 Z pulse threshold PULSE_TMLT(1)(4) R/W 0x26 0x27 00000000 0x00 Time limit for pulse PULSE_LTCY(1)(4) R/W 0x27 0x28 00000000 0x00 Latency time for 2nd pulse Table 12. Register address map (Continued) Name Type Register Address Auto-Increment Address Default Hex Value Comment FMODE = 0 F_READ = 0 FMODE > 0 F_READ = 0 FMODE = 0 F_READ = 1 FMODE > 0 F_READ = 1 |
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