MMA8652FC datasheet(53/77 Pages) FREESCALE

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MMA8652FC

Sensors

Freescale Semiconductor, Inc.

6.11

Pulse configuration and status registers

For more information about of how to configure the tap detection and sample code, see application note AN4083, Data

Manipulation and Basic Settings for Xtrinsic MMA865xFC Accelerometers. The tap detection registers are referred to as “Pulse”.

6.11.1

0x21: PULSE_CFG Pulse Configuration register

The PULSE_CFG register configures the event flag for tap detection, enabling/disabling the detection of a single and double

pulse on each of the axes.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DPA

ELE

ZDPEFE

ZSPEFE

YDPEFE

YSPEFE

XDPEFE

XSPEFE

Figure 45. 0x21 PULSE_CFG register (Read/Write)

Table 45. PULSE_CFG register

Bit(s)

Field

Description

Notes

7DPA

Double Pulse Abort

0 Double Pulse detection is not aborted if the start of a pulse is detected during

the time period specified by the PULSE_LTCY register. (default)

1 Setting the DPA bit momentarily suspends the double tap detection if the

start of a pulse is detected during the time period specified by the

PULSE_LTCY register, and the pulse ends before the end of the time period

specified by the PULSE_LTCY register.

6ELE

Pulse event flags are latched into the PULSE_SRC register.

Reading of the PULSE_SRC register clears the event flag.

0 Event detection is disabled (default)

1 Event detection is enabled

5ZDPEFE

Event flag enable for a double pulse event on Z-axis

ZSPEFE

Event flag enable for a single pulse event on Z-axis

3YDPEFE

Event flag enable for a double pulse event on Y-axis

YSPEFE

Event flag enable for a single pulse event on Y-axis

1XDPEFE

Event flag enable for a double pulse event on X-axis

XSPEFE

Event flag enable for a single pulse event on X-axis

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