STA321 datasheet(75/157 Pages) STMICROELECTRONICS

75 / 157 page

STA321

I2C interface

Doc ID 15351 Rev 3

75/157

I2C interface

13.1

Communication protocol

13.1.1

Data transition and change

Data changes on the SDA line must only occur when the SCL clock is low. SDA transition

while the clock is high is used to identify a START or STOP condition.

13.1.2

Start condition

START is identified by a high to low transition of the SDA bus while the clock signal, SCL, is

stable in the high state. A START condition must precede any command for data transfer.

13.1.3

Stop condition

STOP is identified by a low to high transition on the SDA bus while the clock signal, SCL, is

stable in the high state. A STOP condition terminates communication between STA321 and

the bus master.

13.1.4

Data input

During the data input the STA321 samples the SDA signal on the rising edge of clock SCL.

For correct device operation the SDA signal must be stable during the rising edge of the

clock and the data can change only when the SCL line is low.

13.1.5

Device addressing

To start communication between the master and the STA321, the master initiates with a

start condition. Following this, the master sends 8 bits (MSB first) on the SDA line which

corresponds to the device select address and read or write mode.

The 7 MSBs are the device address identifiers, corresponding to the I2C bus definition. In

the STA321 the I2C interface has the device address 0x30.

After a START condition the STA321 identifies the device address and if a match is found,

acknowledges the identification on SDA bus during the 9th bit time. The byte following the

device identification byte is the internal space address.

13.1.6

Write operation

Following the START condition the master sends a device select code with the RW bit set

to 0. After the STA321 acknowledge, the master sends the byte of internal address. On

receiving the internal byte address the STA321 responds with acknowledge.

Byte write

In the byte write mode the master sends one data byte, this is acknowledged by the

STA321. The master then terminates the transfer by generating a STOP condition.

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