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STW82102B 데이터시트(PDF) 53 Page - STMicroelectronics

부품명 STW82102B
상세설명  RF down converter with embedded integer-N synthesizer
PDF  67 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STW82102B
SPI digital interface
Doc ID 018516 Rev 2
53/67
10.4
Device calibration through the SPI interface
10.4.1
VCO calibration procedure (SPI interface)
The calibration of the VCO center frequency is activated by setting to ’1’ the SERCAL bit
(ST2 Register bit [6]).
In order to program properly the device while ensuring the VCO calibration, the following
procedure is required before every channel change:
1.
Program the ST1 Register with the desired setting (DAC, Mixer, LO Control)
2.
Program the ST3 Register with the desired setting (Functional mode, B and A counters)
3.
Program the ST2 Register with the desired setting (R counter, VCO amplitude, Charge
Pump, Prescaler Modulus) and SERCAL bit set to ’1’
The maximum allowed PFD frequency (FPFD) to perform the calibration process is 1 MHz; if
the desired FPFD is higher than 1 MHz the following steps are needed:
4.
Perform all the steps of the above calibration procedure programming the desired VCO
frequency with a proper setting of R, B and A counter so that FPFD results lower than 1
MHz.
5.
Once calibration is completed program the device with the proper setting for the desired
VCO and PFD frequencies according to the following steps:
a)
Program the ST3 Register with the desired setting (Functional mode, B and A
counters)
b)
Program the ST2 Register with the desired setting (R counter, VCO amplitude,
Charge Pump, Prescaler Modulus) with the SERCAL bit set to ’0’.
10.4.2
Power ON sequence (SPI interface)
At power-on the device is configured in power-down mode.
In order to guarantee correct setting of the internal circuitry after the power on, the following
steps must be followed:
1.
Power up the device
2.
Provide the reference clock
3.
Implement the first programming sequence with a proper delay time between the ST3
and ST2 load rising edges (see Figure 24). The Tdelay value must respect the following
condition:
Fref is the reference clock frequency.
T
delay
1023
1
F
ref
----------
×
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