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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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OR3LP26B 데이터시트(PDF) 48 Page - Agere Systems |
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OR3LP26B 데이터시트(HTML) 48 Page - Agere Systems |
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48 / 184 page  ORCA OR3LP26B FPSC Data Sheet Embedded Master/Target PCI Interface March 2000 48 Lucent Technologies Inc. Lucent Technologies Inc. PCI Bus Core Detailed Description Dual Port (continued) Table 19. Dual-Port Master Read, 64-Bit Address Supplied * mrlastcycn is 0 during the last Quadword transferred. Table 20. Dual-Port Master Read, 32-Bit Address Supplied * mrlastcycn is 0 during the last Quadword transferred. mstatecntr Next State of mstatecntr Description Bus maenn mwlastcycn mrlastcycn mrdataenn 0 0 Idle — 1 1 1 1 0 1 BE[7:0], Burst Length datafmfpgax[7:0] datafmfpga[63:0] 01 1 1 1 4 Address[63:0] datafmfpga[63:0] 0 0 1 1 4 4 or 0 Data[63:0] datatofpga[63:0] 1 1 0* 0 mstatecntr Next State of mstatecntr Description Bus maenn mwlastcycn mrlastcycn mrdataenn 0 0 Idle — 1 1 1 1 0 4 BE[7:0], Burst Length, Address[31:0] datafmfpgax[7:0] datafmfpga[63:0] 00 1 1 4 4 or 0 Data[63:0] datatofpga[63:0] 1 1 0* 0 |
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