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DP83848JSQ 데이터시트(PDF) 56 Page - Texas Instruments |
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DP83848JSQ 데이터시트(HTML) 56 Page - Texas Instruments |
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56 / 80 page ![]() 55 www.national.com 5 LED_CNFG[0] Strap, RW LED Configuration LED_ CNFG[0] Mode Description 1 Mode 1 0 Mode2 In Mode 1, LEDs are configured as follows: LED_LINK = ON for Good Link, OFF for No Link LED_SPEED = ON in 100Mb/s, OFF in 10Mb/s In Mode 2, LEDs are configured as follows: LED_LINK = ON for good Link, BLINK for Activity LED_SPEED = ON in 100Mb/s, OFF in 10Mb/s 4:0 PHYADDR[4:0] Strap, RW PHY Address: PHY address for port. Table 27. PHY Control Register (PHYCR), address 0x19 (Continued) Bit Bit Name Default Description |
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