| 전자부품 데이터시트 검색엔진 |
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DP83848JSQ 데이터시트(PDF) 58 Page - Texas Instruments |
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DP83848JSQ 데이터시트(HTML) 58 Page - Texas Instruments |
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58 / 80 page ![]() 57 www.national.com 7.2.9 CD Test and BIST Extensions Register (CDCTRL1) Table 29. CD Test and BIST Extensions Register (CDCTRL1), address 0x1B Bit Bit Name Default Description 15:8 BIST_ERROR_CO UNT 0, RO BIST ERROR Counter: Counts number of errored data nibbles during Packet BIST. This value will reset when Packet BIST is restarted. The counter sticks when it reaches its max count. 7:6 RESERVED 0, RW RESERVED: Must be zero. 5 BIST_CONT_MOD E 0, RW Packet BIST Continuous Mode: Allows continuous pseudo random data transmission without any break in transmission. This can be used for transmit VOD testing. This is used in conjunction with the BIST controls in the PHYCR Register (0x19h). For 10Mb operation, jabber function must be dis- abled, bit 0 of the 10BTSCR (0x1Ah), JABBER_DIS = 1. 4 CDPATTEN_10 0, RW CD Pattern Enable for 10Mb: 1 = Enabled. 0 = Disabled. 3 RESERVED 0, RW RESERVED: Must be zero. 2 10MEG_PATT_GA P 0, RW Defines gap between data or NLP test sequences: 1 = 15 µs. 0 = 10 µs. 1:0 CDPATTSEL[1:0] 00, RW CD Pattern Select[1:0]: If CDPATTEN_10 = 1: 00 = Data, EOP0 sequence 01 = Data, EOP1 sequence 10 = NLPs 11 = Constant Manchester 1s (10MHz sine wave) for harmonic dis- tortion testing. |
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