DP83848JSQ datasheet(63/80 Pages) TI

부품명	DP83848JSQ

상세설명	DP83848J PHYTER Mini LS Commercial Temperature Single Port 10/100 Mb/s Ethernet Transceiver

PDF	80 Pages

Scroll/Zoom	100%

제조업체	TI [Texas Instruments]

홈페이지	http://www.ti.com

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8.2.2 Reset Timing

Note: It is important to choose pull-up and/or pull-down resistors for each of the hardware configuration pins that provide

fast RC time constants in order to latch-in the proper value prior to the pin transitioning to an output driver.

Vcc

Hardware

RESET_N

MDC

32 clocks

Latch-In of Hardware

Configuration Pins

Dual Function Pins

Become Enabled As Outputs

input

output

T2.2.3

T2.2.2

T2.2.1

X1 clock

T2.2.4

Parameter

Description

Notes

Min

Typ

Max

Units

T2.2.1

Post RESET Stabilization time

prior to MDC preamble for reg-

ister accesses

MDIO is pulled high for 32-bit serial man-

agement initialization

µs

T2.2.2

Hardware Configuration Latch-

in Time from the Deassertion

of RESET (either soft or hard)

Hardware Configuration Pins are de-

scribed in the Pin Description section

µs

T2.2.3

Hardware Configuration pins

transition to output drivers

T2.2.4

RESET pulse width

X1 Clock must be stable for at min. of 1us

during RESET pulse low time.

µs

DP83848JSQ 데이터시트(PDF) 63 Page - Texas Instruments

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