MPC8315CVRADDA datasheet(8/106 Pages) FREESCALE

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MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Electrical Characteristics

using a simple handshake protocol. The three user programmable machines (UPMs) can be programmed

to interface to synchronous devices or custom ASIC interfaces. Each chip select can be configured so that

the associated chip interface can be controlled by the GPCM or UPM controller. Both may exist in the

same system. The local bus can operate at up to 66 MHz.

The system timers include the following features: periodic interrupt timer, real time clock, software

watchdog timer, and two general-purpose timer blocks.

Electrical Characteristics

This section provides the AC and DC electrical specifications and thermal characteristics for the

MPC8315E, which is currently targeted to these specifications. Some of these specifications are

independent of the I/O cell, but they are included for complete reference. These are not purely I/O buffer

design specifications.

3.1

Overall DC Electrical Characteristics

This section covers the ratings, conditions, and other characteristics.

3.1.1

Absolute Maximum Ratings

This table provides the absolute maximum ratings.

Table 1. Absolute Maximum Ratings 1

Characteristic

Symbol

Max Value

Unit

Note

Core supply voltage

VDD

–0.3 to 1.26

—

PLL supply voltage

AVDD

–0.3 to 1.26

—

DDR1 DRAM I/O supply voltage

GVDD

–0.3 to 2.7

—

DDR2 DRAM I/O supply voltage

GVDD

–0.3 to 1.9

—

PCI, local bus, DUART, system control and power

management, I2C, Ethernet management, 1588 timer and

JTAG I/O voltage

NVDD

–0.3 to 3.6

USB, and eTSEC I/O voltage

LVDD

–0.3 to 2.75 or

–0.3 to 3.6

V6, 8

PHY voltage

USB PHY

USB_PLL_PWR1

–0.3 to 1.26

—

USB_PLL_PWR3,

USB_VDDA_BIAS,

VDDA

–0.3 to 3.6

—

SERDES PHY

XCOREVDD,

XPADVDD,

SDAVDD

–0.3 to 1.26

—

SATA PHY

SATA_VDD,

VDD1IO,

VDD1ANA

–0.3 to 1.26

—

VDD33PLL,

VDD33ANA

–0.3 to 3.6

—

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