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MPC8315CVRADDA 데이터시트(PDF) 89 Page - Freescale Semiconductor, Inc

부품명 MPC8315CVRADDA
상세설명  MPC8315E PowerQUICC II Pro Processor Hardware Specifications
PDF  106 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8315CVRADDA 데이터시트(HTML) 89 Page - Freescale Semiconductor, Inc

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MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
89
Package and Pin Listings
VSS1IO
M24, N24, P19, P20, P25, P27, R25, R27,
T24
I—
XCOREVDD
P2, P10, R2, T1
I
XCOREVSS
R3, R10, U2, V2
I
XPADVDD
P3, R9, U3
I
XPADVSS
P5, P9, V3
I
Note:
1. This pin is an open drain signal. A weak pull-up resistor (1 k
) should be placed on this pin to NVDD.
2. This pin is an open drain signal. A weak pull-up resistor (2–10 k
) should be placed on this pin to NVDD.
3. This output is actively driven during reset rather than being three-stated during reset.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull up if the chip is in PCI host mode. Follow PCI specifications recommendation.
6. This pin must always be tied to VSS.
7. Thermal sensitive resistor.
8. This pin should be
connected to USB_VSSA_BIAS through 10K precision resistor.
9. The LB_POR_CFG_BOOT_ECC functionality for this pin is only available in MPC8315E revision 1.1 and later. The
LB_POR_CFG_BOOT_ECC is sampled only during the PORESET negation. This pin with an internal pull down resistor enables
the ECC by default. To disable the ECC an external strong pull up resistor or a tristate buffer is needed.
10.This pin should be connected to an external 2.7 K ±1% resistor connected to VSS. The resistor should be placed as close as
possible to the input.
11.This pin has a weak internal pull-down.
12.This pin has a weak internal pull-up.
Table 70. MPC8315E TEPBGA II Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Note



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