STM32F102X8 datasheet(77/80 Pages) STMICROELECTRONICS

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DocID15056 Rev 5

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STM32F102x8, STM32F102xB

Revision history

Table 54. Document revision history

Date

Revision

Changes

23-Sep-2008

Initial release.

23-Apr-2009

I/O information clarified on page 1. Figure 1: STM32F102T8 medium-

density USB access line block diagram and Figure 5: Memory map

modified.

In Table 4: Medium-density STM32F102xx pin definitions: PB4, PB13,

PB14, PB15, PB3/TRACESWO moved from Default column to Remap

column.

PD value added for LQFP64 package in Table 8: General operating

conditions.

Note modified in Table 13: Maximum current consumption in Run mode,

code with data processing running from Flash and Table 15: Maximum

current consumption in Sleep mode, code running from Flash or RAM.

Figure 13, Figure 14 and Figure 15 show typical curves.

Figure 31: ADC accuracy characteristics modified.

Figure 33: Power supply and reference decoupling modified.

Table 20: High-speed external user clock characteristics and Table 21:

Low-speed external user clock characteristics modified.

ACCHSI max values modified in Table 24: HSI oscillator characteristics.

Small text changes.

22-Sep-2009

Note 5. updated in Table 4: Medium-density STM32F102xx pin

definitions.

VRERINT and TCoeff added to Table 12: Embedded internal reference

voltage. Typical IDD_VBAT value added in Table 16: Typical and maximum

current consumptions in Stop and Standby modes. Figure 12: Typical

current consumption on VBAT with RTC on versus temperature at

different VBAT values added.

fHSE_ext min modified in Table 20: High-speed external user clock

characteristics.

CL1 and CL2 replaced by C in Table 22: HSE 4-16 MHz oscillator

characteristics and Table 23: LSE oscillator characteristics (fLSE =

32.768 kHz), notes modified and moved below the tables. Table 24: HSI

oscillator characteristics modified. Conditions removed from Table 26:

Low-power mode wakeup timings.

Note 1. modified below Figure 18: Typical application with an 8 MHz

crystal.

Figure 25: Recommended NRST pin protection modified.

IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to

IEC 61967-2 in Section 5.3.10: EMC characteristics on page 48.

Jitter added to Table 27: PLL characteristics.

Table 43: SPI characteristics modified.

CADC and RAIN parameters modified in Table 47: ADC characteristics.

RAIN max values modified in Table 48: RAIN max for fADC = 12 MHz.

Small text changes.

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