| 전자부품 데이터시트 검색엔진 |
|
MPC8306SEC 데이터시트(PDF) 61 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8306SEC 데이터시트(HTML) 61 Page - Freescale Semiconductor, Inc |
|
61 / 70 page ![]() MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1 Freescale Semiconductor 61 Thermal 21 Thermal This section describes the thermal specifications of the MPC8306S. 21.1 Thermal Characteristics The following table provides the package thermal characteristics for the 369, 19 19 mm MAPBGA of the MPC8306S. 21.1.1 Thermal Management Information For the following sections, PD =(VDD IDD)+PI/O, where PI/O is the power dissipation of the I/O drivers. 21.1.2 Estimation of Junction Temperature with Junction-to-Ambient Thermal Resistance An estimation of the chip junction temperature, TJ, can be obtained from the equation: TJ =TA +(R JA PD) Eqn. 1 where: TJ = junction temperature (C) Table 55. Package Thermal Characteristics for MAPBGA Characteristic Board type Symbol Value Unit Notes Junction-to-ambient natural convection Single-layer board (1s) RJA 39 °C/W 1, 2 Junction-to-ambient natural convection Four-layer board (2s2p) RJA 24 °C/W 1, 2, 3 Junction-to-ambient (@200 ft/min) Single-layer board (1s) RJMA 32 °C/W 1, 3 Junction-to-ambient (@200 ft/min) Four-layer board (2s2p) RJMA 21 °C/W 1, 3 Junction-to-board — RJB 14 °C/W 4 Junction-to-case — RJC 9°C/W 5 Junction-to-package top Natural convection JT 2°C/W 6 Notes: 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2. Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification. 3. Per JEDEC JESD51-6 with the board horizontal. 4. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board near the package. 5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1). 6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |