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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AX2000 데이터시트(PDF) 85 Page - Microsemi Corporation |
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AX2000 데이터시트(HTML) 85 Page - Microsemi Corporation |
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85 / 262 page  Axcelerator Family FPGAs Re vi s i on 18 2 - 71 The ClockTileDist Cluster contains an HCLKMux (HM) module for each of the four HCLK trees and a CLKMux (CM) module for each of the CLK trees. The HCLK branches then propagate horizontally through the middle of the core tile to HCLKColDist (HD) modules in every SuperCluster column. The CLK branches propagate vertically through the center of the core tile to CLKRowDist (RD) modules in every SuperCluster row. Together, the HCLK and CLK branches provide for a low-skew global fanout within the core tile (Figure 2-40 and Figure 2-41). Figure 2-40 • CTD, CD, and HD Module Layout Figure 2-41 • HCLK and CLK Distribution within a Core Tile |
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