 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
CS494002 데이터시트(PDF) 23 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS494002 데이터시트(HTML) 23 Page - Cirrus Logic |
|
|
23 / 100 page  23 1.15 Switching Characteristics — Serial Audio Input (DSPC) (TA =25 °C; VDD, PLLVDD = 2.5 V; VDDSD = 3.3 V; CL =20pF) Notes: 1. Slave mode is defined as SCLKN and LRCLKN being driven by an external source. 2. This timing parameter is defined from the active edge of SCLKN. The active edge of SCLKN is the point at which the data is valid. Parameter Symbol Min Max Unit Slave Mode SCLKN period for Slave mode Tsclki 40 - ns SCLKN duty cycle for Slave mode 45 55 % Time from active edge of SCLKN to LRCLKN transition Tstlr 20 - ns Time from LRCLKN transition to SCLKN active edge Tlrts 20 - ns SDATAN0 setup to SCLKN transition (Notes 2) Tsdsus 10 - ns SDATAN0 hold time after SCLKN transition (Notes 2) Tsdhs 10 - ns SCLKN Tsclki SDATAN0, 1, 2, 3 LRCLKN Tlrts Tstlr Tsdsus Tsdhs Figure 14. Serial Audio Input Data, Slave Clock Timing |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
