CS494002 datasheet(45/100 Pages) CIRRUS

45 / 100 page

Figure 31, "SPI Timing for DSPAB" on page 43

timing diagram shows the relative edges of the

control lines for an SPI read and write.

6.1.2 SPI Communication for DSPC

SPI

communication

with

the

DSPC

accomplished with five communication lines: chip

select, serial control clock, serial data in, serial data

out, and an interrupt request line that signals DSPC

has data to transmit to the host. Table 5 lists the

mnemonic, pin name, and pin number of each of

these signals on DSPC.

6.1.2.1 Writing in SPI for DSPC

When writing to the device in SPI the same

protocol will be used whether writing a byte, a

message or even an entire executable download

image. The examples shown in this document can

be expanded to fit any write situation. Figure 33,

"SPI Write Flow Diagram for DSPC" on page 45

shows a typical write sequence

The following is a detailed description of an SPI

write sequence with DSPC.

1) An SPI transfer is initiated when chip select

(SCS) is driven low.

2) This is followed by a 7-bit address and the

read/write bit set low for a write. The address

for DSPC defaults to 1000001b. It is necessary

to clock in this address prior to any transfer in

order for DSPC to accept the write. In other

words a byte of 0x82 should be clocked into the

device preceding any write. The 0x82 byte

represents the 7-bit address 1000001b, and the

least significant bit set to 0 to designate a write.

3) The host should then clock data into the device

most significant bit first, four bytes at a time.

The data byte is transferred to the DSP on the

falling edge of the eighth serial clock. For this

Mnemonic

Pin Name

144-Pin

Package,

Number

100-Pin

Package,

Number

Chip Select

SCS

135

Serial Clock

SCCLK

142

Serial Data In

SCDIN

136

Serial Data Out

SCDOUT

140

Host Busy

HINBSY

141

N/A

Interrupt

Request

INTREQ

Table 5. SPI Communication Signals for DSPC

SPISTART:SCS (LOW)

WRITE ADDRESS BYTE

WITH MODE BIT

SET TO 0 FOR WRITE

MORE DATA?

WRITE 4 DATA BYTES

SPI STOP: SCS (HIGH)

HINBSY

(HIGH)?

Figure 33. SPI Write Flow Diagram for DSPC

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