| 전자부품 데이터시트 검색엔진 |
|
AN3276 데이터시트(PDF) 10 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN3276 데이터시트(HTML) 10 Page - STMicroelectronics |
|
10 / 22 page ![]() The new ST solution - BC2: energy recovery circuit AN3276 10/22 Doc ID 17975 Rev 1 VNS2 voltage is subtracted from VOUT. This behavior provides the BC 2 circuit with a benefit since under the low output load, power saving occurs in the system and it can be evaluated using: Thus, the BC2 reduces switch-off losses too. 2.2.3 Phase t1 to t2 Figure 10. Equivalent circuit t1 to t2 At t1+, the boost diode DB turns off, and an overcurrent IRM is stored in the small inductor. This overcurrent discharges the DB junction capacitance linearly. At the same time, the voltage polarity across the main inductor changes until it reaches D1 diode conduction. At this time, the overcurrent IRM is reduced by the transformer ratio m1 and is sent to the main inductor. Thus, the current flowing through NS1 contributes to charge the internal coil magnetization LB at the same time as the Np winding biased by the mains voltage. The IRM current flowing in D1 decreases down to reach 0 A thanks to the reflected voltage VNS1 that it is given by: and To guarantee a soft switching behavior in discontinuous mode, the current in D1 should reach 0 A before time t3. The tD1_ON time trend supports the PFC application since the IRM current is the largest when the Vmains voltage in the sinusoidal period is the highest. In addition, to cancel the D1 recovery current diode effect, the dI/dt_D1 is always low thanks to the low reflected voltage VNS1 and it is given by: Unfortunately, during this phase a high reverse voltage is applied across the boost diode DB: switching 2 mains out 2 out OSS 0 t OSS C F . 2 m 1 2 m . V V V . C . 2 1 P ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎣ ⎡ ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + + − = − L DB D2 D1 V V mains NS2 NS1 I I 0 RM V OUT TR + - - + Cj 1 m 1 1 m . V V mains 1 NS − − = 1 m . V ) 1 m 1 .( L . I _ t mains RM ON 1 D − ≈ L ). 1 m 1 ( 1 m . V dt dI_D mains − − ≈ 1 1 m 1 ) 2 m 1 m .( V V V V V V mains out 2 NS 1 NS out reverse _ DB − + + = + + = |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |