STRFNFCA datasheet(9/74 Pages) STMICROELECTRONICS

9 / 74 page

STRFNFCA

Power management and operating modes

Doc ID 023077 Rev 10

9/74

3.2

Startup sequence

After the power supply is established at power-on, the STRFNFCA waits for a low pulse on

the pin IRQ_IN (t1) before automatically selecting the external interface (SPI or UART) and

entering Ready state after a delay (t3).

Note for pin SSI0: - - - SPI selected, –––– UART selected

Pin IRQ_IN low level < 0.2 VPS_Main.

Note:

When STRFNFCA leaves WFE mode (from Power-up, Hibernate, Tag Detector, or

Sleep/Field Detector) following an |RQ_IN/RX low level pulse, this pulse is NOT interpreted

as the UART start bit character.

Figure 4.

STRFNFCA initialization and operating state change

Supply off

PowerUP

Tag Detector

Sleep /

Field Detector

Hibernate

WAIT FOR EVENT

READY

Reader

Card

Emulation

ACTIVE

Protocol

Select cde

Serial I/F

selection

IDLE

cde

Wake

Protocol

Select cde

Figure 5.

Power-up sequence

MS20021V1

VPS

IRQ_IN

First valid

command

SSI_1

SSI_0

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