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PI7C8150BMA-33 데이터시트(PDF) 77 Page - Pericom Semiconductor Corporation

부품명 PI7C8150BMA-33
상세설명  ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
PDF  107 Pages
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제조업체  PERICOM [Pericom Semiconductor Corporation]
홈페이지  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI7C8150BMA-33 데이터시트(HTML) 77 Page - Pericom Semiconductor Corporation

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PI7C8150B
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
Page 77 of 107
April 2015 – Revision 2.1
14.1.5
REVISION ID REGISTER – OFFSET 08h
Bit
Function
Type
Description
7:0
Revision
R/O
Indicates revision number of device. Hardwired to 02h
14.1.6
CLASS CODE REGISTER – OFFSET 08h
Bit
Function
Type
Description
15:8
Programming
Interface
R/O
Read as 0 to indicate no programming interfaces have been defined
for PCI-to-PCI bridges
23:16
Sub-Class Code
R/O
Read as 04h to indicate device is PCI-to-PCI bridge
31:24
Base Class Code
R/O
Read as 06h to indicate device is a bridge device
14.1.7
CACHE LINE SIZE REGISTER – OFFSET 0Ch
Bit
Function
Type
Description
7:0
Cache Line Size
R/W
Designates the cache line size for the system and is used when
terminating memory write and invalidate transactions and when
prefetching memory read transactions.
Only cache line sizes (in units of 4-byte) which are a power of two
are valid (only one bit can be set in this register; only 00h, 01h, 02h,
04h, 08h, and 10h are valid values).
Reset to 0
14.1.8
PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch
Bit
Function
Type
Description
15:8
Primary Latency
timer
R/W
This register sets the value for the Master Latency Timer, which
starts counting when the master asserts FRAME_L.
Reset to 0
14.1.9
HEADER TYPE REGISTER – OFFSET 0Ch
Bit
Function
Type
Description
23:16
Header Type
R/O
Read as 01h to indicate that the register layout conforms to the
standard PCI-to-PCI bridge layout.
14.1.10
PRIMARY BUS NUMBER REGISTSER – OFFSET 18h
Bit
Function
Type
Description
7:0
Primary Bus
Number
R/W
Indicates the number of the PCI bus to which the primary interface
is connected. The value is set in software during configuration.
Reset to 0
14.1.11
SECONDARY BUS NUMBER REGISTER – OFFSET 18h
Bit
Function
Type
Description
15:8
Secondary Bus
Number
R/W
Indicates the number of the PCI bus to which the secondary
interface is connected. The value is set in software during
configuration.
Reset to 0
15-0048



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