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TAS3103DBT 데이터시트(PDF) 17 Page - Texas Instruments |
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TAS3103DBT 데이터시트(HTML) 17 Page - Texas Instruments |
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17 / 146 page ![]() 1−9 1.7.1 Terminal-Controlled Modes 1.7.1.1 Clock Control PLL1 PLL0 DAP CLOCK 0 0 11 x MCLK 0 1 (11 x MCLK)/2 1 0 (11 x MCLK)/4 1 1 MCLK (PLL bypass) MICROCLK_DIV MICROPROCESSOR CLOCK 0 DAP clock/4 1 DAP clock XTALI MCLKI Reference Divider PLL PLL0 Digital Audio Processor (DAP) Clock MICROCLK_DIV MCLK PLL1 ÷ 11 Microprocessor Clock < 36 MHz Microprocessor Scaler 1400 x Fs 3 DAP Clock 3 136 MHz 1.7.1.2 I2C Bus Setup SLAVE ADDRESS CS1 CS0 0x68/69 0 0 0x6A/6B 0 1 0x6C/D 1 0 0x6E/6F 1 1 I2CM_S I2C BUS MODE 0 Slave 1 Master a6 = 0 a5 = 1 a4 = 1 a3 = 0 a2 = 1 a1=CS1 a0=CS0 R/W ACK SDA SCL 12 3 4 5 6 7 8 9 Start TAS3103 I2C Slave Address 1.7.1.3 Power-Down/Sleep Selection PWRDN POWER STATUS 0 Active 1 Power down/sleep |
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