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TMP320C2811PBKA 데이터시트(PDF) 110 Page - Texas Instruments

부품명 TMP320C2811PBKA
상세설명  TMS320R2811, TMS320R2812 Digital Signal Processors
PDF  147 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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TMP320C2811PBKA 데이터시트(HTML) 110 Page - Texas Instruments

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Electrical Specifications
110
June 2004
SPRS257
20
15
SPISIMO
SPISOMI
SPICLK
(clock polarity = 1)
SPICLK
(clock polarity = 0)
SPISIMO Data
Must Be Valid
SPISOMI Data Is Valid
19
16
14
13
12
SPISTE†
† In the slave mode, the SPISTE signal should be asserted low at least 0.5tc(SPC) before the valid SPI clock edge and remain
low for at least 0.5tc(SPC) after the receiving edge (SPICLK) of the last data bit.
Figure 6−23. SPI Slave Mode External Timing (Clock Phase = 0)



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