PC87591L datasheet(370/437 Pages) NSC

370 / 437 page

Host-Controlled Modules and Host Interface (Continued)

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370

Revision 1.07

RTC Control Register D (CRD)

Location: Index 0D16

Type: RO

Date of Month Alarm Register (DOMA)

Location: Programmable Index

Type: R/W

Month Alarm Register (MONA)

Location: Programmable Index

Type: R/W

Bit

76543210

Name

Valid RAM

and Time

Reserved

Reset

00000000

Bit

Description

6-0

Reserved.

Valid RAM and Time. This bit senses the voltage that feeds the RTC (VCC or VBAT) and indicates whether or

not it was too low since the last time this bit was read. If it was too low (i.e., < VLOWBAT), the RTC contents

(time/calendar registers and CMOS RAM) are not valid. This bit is set after the CRD is read.

0: The voltage that feeds the RTC was too low

1: RTC contents (time/calendar registers and CMOS RAM) valid

Bit

76543210

Name

Date of Month Alarm Data

Reset

11000000

Bit

Description

7-0

Date of Month Alarm Data. Values may be 01 to 31 in BCD format or 01 to 1F in binary format.

When bits 7 and 6 are both set to one (“11”), unconditional match is selected (default).

Bit

76543210

Name

Month Alarm Data

Reset

11000000

Bit

Description

7-0

Month Alarm Data. Values may be 01 to 12 in BCD format or 01 to 0C in binary format.

When bits 7 and 6 are both set to one (“11”), unconditional match is selected (default).

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