PC87591L datasheet(109/437 Pages) NSC

109 / 437 page

Embedded Controller Modules (Continued)

Revision 1.07

109

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4.4.3

MIWU Registers

For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 34.

MIWU Register Map

Edge Detection Register (WKEDG1)

Byte-wide read/write register that configures the trigger condition of the input signals WUI10 to WUI17. The register is

cleared on reset. This configures all associated input signals to be triggered on a rising edge.

Location: 00 FFC016

Type: R/W

Mnemonic

Type

WKEDG1

Edge Detection Register

R/W

WKEDG2

Edge Detection Register

R/W

WKEDG3

Edge Detection Register

R/W

WKEDG4

Edge Detection Register

R/W

WKPND1

Pending Register

R/W

WKPND2

Pending Register

R/W

WKPND3

Pending Register

R/W

WKPND4

Pending Register

R/W

WKEN1

Enable Register

R/W

WKEN2

Enable Register

R/W

WKEN3

Enable Register

R/W

WKEN4

Enable Register

R/W

WKPCL1

Pending Clear Register

WKPCL2

Pending Clear Register

WKPCL3

Pending Clear Register

WKPCL4

Pending Clear Register

Bit

76543210

Name

WKED17-WKED10

Reset

00000000

Bit

Description

7-0

Edge Selection. For inputs WUI10 through WUI17. Each bit is associated with one of eight inputs.

0: Low-to-High transition.

1: High-to-Low transition.

PC87591L 데이터시트(PDF) 109 Page - National Semiconductor (TI)

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