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PC87591L 데이터시트(PDF) 147 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 PC87591L
상세설명  LPC Mobile Embedded Controllers
PDF  437 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87591L 데이터시트(HTML) 147 Page - National Semiconductor (TI)

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Embedded Controller Modules (Continued)
Revision 1.07
147
www.national.com
4.8
PULSE WIDTH MODULATOR (PWM)
The PWM module generates eight 8-bit PWM outputs; each may have a different duty cycle. A common 8-bit clock pre-scaler
and an 8-bit down-counter determine the cycle time, the minimal possible pulse width and the duty cycle steps.
4.8.1
Features
●
Eight PWM outputs
●
One 8-bit fully programmable pre-scaler
●
One 8-bit fully programmable down-counter
●
8-bit duty cycle control per output
●
Programmable polarity per output
●
Low Power mode
4.8.2
Functional Description
The PWM generates eight 8-bit PWM outputs, PWM0 to PWM7. The Duty Cycle registers 0 to 7 (DCRi, i = 0 to 7) control
the duty cycle of PWM0 to PWM7 output signals, respectively. The Cycle Time register (CTR) controls the cycle time and
duty cycle steps of all outputs.
The PWM use the core domain clock as a reference for its activities. The pre-scaler divider divides the PWM input clock by
a pre-programmable ratio of 1:1 through 1:256, as defined by the Clock Pre-Scaler register (PRSC).
The PWM cycle is defined in terms of cycles of the pre-scaler output clock. It has a period of (CTR +1) cycles, out of which
the signal will be high for DCRi cycles. INVPi, when set, may be used to inverse this behavior.
The cycle period is defined by the 8-bit down-counter. It counts using the output clock from the pre-scaler divider, starting
from the value held in CTR register down to 0. When it reaches 0, the down-counter restarts from the CTR value.
The DCRi register defines the number of clock cycles during which PWMi signal is high during the complete down-counter
cycle.
If Inverse PWMi bit (INVPi) in PWM Polarity register (PWMPOL) is active (1), the DCRi register defines the number of clock
cycles during which PWMi signal is low in each of the down-counter complete cycles.
Figure 51 is a functional block diagram of the PWM module.
Figure 51. PWM Block Diagram
8-Bit Pre-Scaler
Counter
Input
Clock
8-Bit
Down-Counter
Cycle Time
Register
Duty Cycle
Register 0
Compare
Duty Cycle
Register 7
Compare
Clock Pre-Scaler
Register
S
R
Down-Counter == CTR
Q
Q
PWM0
R
S
Q Q
PWM7
INVPi
INVPi
0
1
0
1



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