MT9072AB datasheet(47/275 Pages) ZARLINK

47 / 275 page

MT9072

Data Sheet

Zarlink Semiconductor Inc.

5.1.3

T1 T1DM Framing

The Ft and Fs bits are identical to the D4 format, channel 24 of each frame has a synchronization byte consisting of

10111YR0.

Y is used to indicate a yellow alarm and is active low. R bit is reserved by AT&T as an 8 Kb/s communication

channel.

The synchronization is first declared if the Ft bit is in sync and subsequently 6 consecutive T1DM synchronization

bytes are received. The synchronization error criteria for the receiver will be the same as D4 (i.e., 2 out of 4, 5 or 6).

Although an error is detected if any of 5 synchronization bits or the Ft/Fs bits are incorrect.The OOF error selection

criteria of 2 errors out of 4, 5, 6 bits is also applicable to the T1DM sync byte format; the error criteria applies to the

synchronization byte and the framing bit. The received sync byte can be monitored by the status register(Y10). The

Y bit an be sent by writing to control register (address Y02). The TIDMR bit can only be input from the Transmit

Data Link Pin. The registers and bits used for T1DM are indicated in the register bit functions.

5.1.4

T1 G.802 Mode

G.802 mode allows interworking between an E1 and T1 system. The line is operating in T1 mode and the

backplane consists of E1 data. The mapping for the backplane channels to the PCM24 side is as shown Table 10.

The 193 bits from the E1 backplane stream are mapped to the 193 bits of the PCM24 side. The channel 0 and

channel 16 on the backplane side are the G.704 Timeslot 0 and 16 channels and are not mapped.

CB3

CB4

CB5

CB6

Frame #

FPS

FDL

CRC

Signaling

Table 9 - ESF Superframe Structure (T1)

MT9072AB 데이터시트(PDF) 47 Page - Zarlink Semiconductor Inc