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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MT9072AB 데이터시트(PDF) 233 Page - Zarlink Semiconductor Inc |
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MT9072AB 데이터시트(HTML) 233 Page - Zarlink Semiconductor Inc |
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233 / 275 page  MT9072 Data Sheet 233 Zarlink Semiconductor Inc. Figure 19 - E3 (34 Mb/s) MUX Cross Connect with 16 Asynchronous E1 Links PRI SEC F0o C2o C4o PLL Notes: Framer 1-16, 2 of MT9072 LDX, 1 of MT90820 PLL, 1 of MT9042 - Framer elastic buffer is used. - LIU Transmit JA and PLL are bypassed. Framers 2 to 15 DSTo CSTo DSTi CSTi CKi FPi RXPOS RXNEG R34CK TXPOS TXNEG T34CK E3 MUX RPOS RNEG RCLK TPOS TNEG TCLK E3 LIU RT RR TT TR Transmit xfmr E3 LINE Receive xfmr RPOS RNEG E2i TPOS TNEG T20 14 14 14 14 STi0 STo0 STi1-14 STo1-14 STi15 STo15 F0i C4i LDX 14 14 RPOS RNEG RCLK TPOS TNEG TCLK RPOS RNEG RCLK TPOS TNEG TCLK RPOS RNEG RCLK TPOS TNEG TCLK 14 14 From RCLK’s of E3 MUX RPOS RNEG E2i TPOS TNEG T2o DSTo CSTo DSTi CSTi CKi FPi Framer 1/16 RPOS RNEG E2i TPOS TNEG T2o DSTo CSTo DSTi CSTi CKi FPi Framer 1/16 |
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