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ML7396AB 데이터시트(PDF) 8 Page - LAPIS Semiconductor Co., Ltd.

부품명 ML7396AB
상세설명  Sub GHz band short range wireless transceiver IC
PDF  140 Pages
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제조업체  LAPIS [LAPIS Semiconductor Co., Ltd.]
홈페이지  http://www.lapis-semi.com/
Logo LAPIS - LAPIS Semiconductor Co., Ltd.

ML7396AB 데이터시트(HTML) 8 Page - LAPIS Semiconductor Co., Ltd.

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●Power supply pins
Pin
No
Pin name
Reset
state
I/O
Active
Level
Detail function
14,18
VDDIO
-/-
PWR
-
Power supply for digital IOs
(Input voltage: 1.8V to 3.3V)
40
VDD_REG
-/-
PWR
-
Power supply for regulator input
(Input voltage: 1.8V to 3.3V)
29
VDD_PA
-/-
PWR
-
Power supply for PA block
(Input voltage: 1.8V to.3.3V, depending on TX
mode)
32
VDD_RF
-/-
PWR
-
Power supply for RF blocks
(REG_OUT is connected, typ.1.5V)
23
VDD_IF
-/-
PWR
-
Power supply for IF block
(REG_OUT is connected, typ.1.5V)
34
VDD_CP
-/-
PWR
-
Power supply for charge pump
(REG_OUT is connected, typ.1.5V)
39
VDD_VCO
-/-
PWR
-
Power supply for VCO
(REG_OUT is connected, typ.1.5V)
EL
-
-/-
GND
-
GND PAD
●Unused pins
Unused pins treatments are as follows:
Pin Name
Pin number
Recommended treatment
XIN
4
Fixed to GND (When TCXO is used)
XOUT
5
Fixed to GND (When TCXO is used)
TCXO
6
Fixed to GND (When crystal OSC is used)
ATEST1
25
Left OPEN
ATEST2
26
Left OPEN
A_MON
24
Left OPEN
ANT_SW
20
Left OPEN
DMON
17
Left OPEN *1
DCNT
22
Left OPEN
*1 If not using DMON, it is necessary to stop clock out (default output on DMON) by CLKOUT_EN
([CLK_SET:B0 0x02(4)]). Left open with enableing clock out causes the perfoemance down on RX sensitivity.
Note: If input pins are high-impedence state and leave open, excess current could be drawn. Care must be taken that unused
input pins and unused I/O pins should not be left open.



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