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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DSP56156ROM 데이터시트(PDF) 73 Page - Motorola, Inc |
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DSP56156ROM 데이터시트(HTML) 73 Page - Motorola, Inc |
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73 / 76 page  Design Considerations 68 DSP56156 Data Sheet MOTOROLA Figure 48 Suggested Bottom Layer Routing The output should be used differentially if at all possible. Analog signal traces should be shielded by running traces connected to analog ground next to them. Unused board area on both interconnect levels should be copper filled and connected to analog ground. The copper fill is only shown on this page for clarity and simplicity. The ADC input anti-aliasing should be done with respect to VREF. Figure 49 presents four options for good power supply connections. 28 0.25 µF 47 k Ω 47 k Ω Copper Fill of unused board space should be connected to the analog ground plane. BIAS AUX MIC 47 k Ω 1nF 47 k Ω 5.6 k Ω MIC IN SPK OUT Analog I/O Considerations Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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