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ST10F296 데이터시트(PDF) 237 Page - STMicroelectronics

부품명 ST10F296
상세설명  High performance 16-bit CPU with DSP functions
PDF  346 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F296 데이터시트(HTML) 237 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
ST10F296E
System reset
237/346
20.9
Reset summary
Table 132 summarizes the different reset events.
Table 132.
Reset events summary
Event
RSTIN
WDTCON flags
Min
Max
Power-on reset
0
0
N
Asynch.
1 ms (VREG)
1.2 ms (reson. + PLL)
10.2 ms (crystal + PLL)
-
111
10
0
1
N
Asynch.
1 ms (VREG)
-
1
1
1
1
0
1
x
x
Forbidden
x
x
Y
Not applicable
Hardware reset
(asynchronous)
0
0
N
Asynch.
500 ns
-
0
1
1
1
0
0
1
N
Asynch.
500 ns
-
0
1
1
1
0
0
0
Y
Asynch.
500 ns
-
0
1
1
1
0
0
1
Y
Asynch.
500 ns
-
0
1
1
1
0
Short hardware
reset
(synchronous)(1)
1
0
N
Synch.
Max (4 TCL, 500 ns)
1032 + 12 TCL + max (4
TCL, 500 ns)
001
10
1
1
N
Synch.
Max (4 TCL, 500 ns)
1032 + 12 TCL + max (4
TCL, 500ns)
001
10
1
0
Y
Synch.
Max (4 TCL, 500 ns)
1032 + 12 TCL + max (4
TCL, 500 ns)
001
10
Activated by internal logic for 1024 TCL
1
1
Y
Synch.
Max (4 TCL, 500 ns)
1032 + 12 TCL + max (4
TCL, 500 ns)
001
10
Activated by internal logic for 1024 TCL
Long hardware
reset
(synchronous)
1
0
N
Synch.
1032 + 12 TCL + max
(4 TCL, 500 ns)
-
011
10
1
1
N
Synch.
1032 + 12 TCL + max(
4 TCL, 500 ns)
-
011
10
1
0
Y
Synch.
1032 + 12 TCL + max
(4 TCL, 500 ns)
-
011
10
Activated by internal logic only for 1024 TCL
1
1
Y
Synch.
1032 + 12 TCL + max
(4 TCL, 500 ns)
-
011
10
Activated by internal logic only for 1024 TCL
Obsolete
Product(s)
- Obsolete
Product(s)



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