ST10F296 datasheet(297/346 Pages) STMICROELECTRONICS

297 / 346 page

Obsolete

Product(s)

- Obsolete

Product(s)

ST10F296E

Electrical characteristics

297/346

IP0H

(7)

Port 0 configuration current(6)

VIN = 2.0 V

-10

µA

IP0L

(8)

VIN = 0.8V

-100

CIO (CC)

Pin capacitance

(digital inputs/outputs)

(1)(6)

-10

ICC1

Run mode power supply current

(execution from internal RAM)(9)

20 + 2 fCPU

ICC2

Run mode power supply current

(execution from internal

Flash)(1)(9)

20 + 1.8 fCPU

IID

Idle mode supply current(10)

20 + 0.6 fCPU mA

IPD1

Power-down supply current

(RTC off, oscillators off, main

voltage regulator off)(11)

TA = 25 °C

TA = 125 °C

IPD2

Power-down supply current(11)

(RTC on, main oscillator on,

main voltage regulator off)

TA = 25 °C

TA = 125 °C

ISB1

Standby supply current (RTC off,

main oscillator off, VDD off, VSTBY

on)(11)

VSTBY = 5.5 V

TA = TJ = 25 °C

-250

µA

VSTBY = 5.5 V

TA = TJ = 125 °C

-500

VSTBY = 5.5 V

TJ = 150°C

(4)

-700

ISB3

Standby supply current (VDD

transient condition)(1)(11)

2.5

Not 100% tested, guaranteed by design characterization.

This specification is not valid for outputs which are switched to open-drain mode. In this case the

respective output floats and the voltage is imposed by the external circuitry.

Port 5 and XPort 10 leakage values are granted for unselected ADC channels. One channel is always

selected (by default, after reset, P5.0 is selected). For the selected channel the leakage value is similar to

that of other port pins.

The leakage of P2.0 is higher than other pins due to the additional logic (pass gates active only in specific

test modes) implemented on its input path. Do not stress P2.0 input pin with negative overload beyond the

specified limits as failures in Flash reading may occur (sense amplifier perturbation). Refer to Figure 96 for

a scheme of the input circuitry.

Overload conditions occur if the standard operating conditions are exceeded, that is, the voltage on any pin

exceeds the specified range (VOV > VDD + 0.3 V or VOV < -0.3 V). The absolute sum of input overload

currents on all port pins must not exceed 50 mA. The supply voltage must remain within the specified limits.

This specification is only valid during reset, or during hold or adapt mode. Port 6 pins are only affected if

they are used for CS output and the open drain function is not enabled.

The maximum current may be drawn while the respective signal line remains inactive.

The minimum current must be drawn to drive the respective signal line active.

Table 163.

DC characteristics (continued)

Symbol

Parameter

Test condition

Limit values

Unit

Min

Max

Obsolete

Product(s)

- Obsolete

Product(s)

ST10F296 데이터시트(PDF) 297 Page - STMicroelectronics

ST10F296 데이터시트(HTML) 297 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL