ST72344S2 datasheet(233/247 Pages) STMICROELECTRONICS

233 / 247 page

ST72344xx, ST2345xx

Device configuration and ordering information

Doc ID 12321 Rev 6

233/247

OPT1 = FMP_R Read-out protection

Readout protection, when selected provides a protection against program memory

content extraction and against write access to Flash memory. Erasing the option bytes

when the FMP_R option is selected will cause the whole memory to be erased first and

the device can be reprogrammed. Refer to the ST7 Flash Programming Reference

Manual and Section 4.5 for more details.

0: Read-out protection off

1: Read-out protection on

OPT0 = FMP_W Flash write protection

This option indicates if the Flash program memory is write protected.

Warning: When this option is selected, the program memory (and the option bit itself)

can never be erased or programmed again.

0: Write protection off

1: Write protection on

15.1.2

Option byte 1

OPT7 = RSTC reset clock cycle selection

This option bit selects the number of CPU cycles inserted during the reset phase and

when exiting Halt mode. For resonator oscillators, it is advised to select 4096 due to the

long crystal stabilization time.

0: Reset phase with 4096 CPU cycles

1: Reset phase with 256 CPU cycles

OPT6:4 = OSCRANGE[2:0] Oscillator range

When the internal RC oscillator is not selected (Option OSC=1), these option bits

select the range of the resonator oscillator current source or the external clock source.

Option byte 0

Option byte 1

765

4321076543210

Default

value

111

1110011110111

Table 120.

Size of sector 0

Sector 0 size

SEC1

SEC0

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