ATM90E32AS-AU-R datasheet(48/84 Pages) ATMEL

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M90E32AS [Datasheet]

Atmel-46003B-SE-M90E32AS-Datasheet_02122015

5.3

LOW-POWER MODES REGISTERS

5.3.1

DETECTION MODE REGISTERS

Current Detection register latching scheme is:

When any of the 4 current detection registers (0x10 - 0x13) were programmed, all the 4 current detection registers (includ-

ing the registers that not being programmed) will be automatically latched into the current detector's internal configuration

latches at the same time. Those latched configuration values are not subject to digital reset signals and will be kept in all

the 4 power modes. The power up value of those latches is not deterministic, so user needs to program the current detec-

tion registers to update.

Figure-21 Current Detection Register Latching Scheme

DetectCtrl

Current Detect Control

Address: 10H

Type: Read/Write

Default Value: xxxxH

Bit

Name

Description

15:7

Must be written ‘3’.

DetCalEn

Detector calibration in Normal mode is enabled if this bit is set. The default written value is ‘0’.

If set, current detectors are enabled and IRQ0/1 are assigned to current detector outputs as if in Detect

mode. The current detector can be calibrated.

5:0

DetectCtrl

Detector power-down, active high:

[5:3]: Power-down for negative detector of channel 3/2/1;

[2:0]: Power-down for positive detector of channel 3/2/1.

The default written value is ‘0’.

0x10

0x11

0x12

0x13

latch

Current detector

update

registers

Current Detector block

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