VS6624P0LP datasheet(26/100 Pages) STMICROELECTRONICS

26 / 100 page

Data synchronization methods

VS6624

26/100

Rev 1

Data synchronization methods

External capture systems can synchronize with the data output from VS6624 in one of two

ways:

Synchronization codes are embedded in the output data

Via the use of two additional synchronization signals: VSYNC and HSYNC

Both methods of synchronization can be programmed to meet the needs of the host system.

Embedded codes

The embedded code sequence can be inserted into the output data stream to enable the

external host system to synchronize with the output frames. The code consists of a 4-byte

sequence starting with 0xFF, 0x00, 0x00. The final byte in the sequence depends on the

mode selected.

Two types of embedded codes are supported by the VS6624: Mode 1 (ITU656) and Mode 2.

The bSyncCodeSetup register is used to select whether codes are inserted or not and to

select the type of code to insert.

When embedded codes are selected each line of data output contains 8 additional clocks: 4

before the active video data and 4 after it.

Prevention of false synchronization codes

The VS6624 is able to prevent the output of 0xFF and/or 0x00 data from being

misinterpreted by a host system as the start of synchronization data. This function is

controlled the bCodeCheckEnable register.

Mode 1 (ITU656 compatible)

The structure of an image frame with ITU656 codes is shown in

Figure 11.

VS6624P0LP 데이터시트(PDF) 26 Page - STMicroelectronics