SH7041A datasheet(380/923 Pages) RENESAS

부품명	SH7041A

상세설명	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

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제조업체	RENESAS [Renesas Technology Corp]

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The TSR register TCFD bit is a count direction flag. Read the TCFD flag to confirm whether the

TCNT is incrementing or decrementing.

Table 12.8 shows the correspondence between channels and external clock pins.

Table 12.8

Phase Counting Mode Clock Input Pins

Channel

A Phase Input Pin

B Phase Input Pin

TCLKA

TCLKB

TCLKC

TCLKD

Procedure for Selecting the Phase Counting Mode (Figure 12.29):

1.Set the MD3–MD0 bits of the timer mode register (TMDR) to select the phase counting mode.

2.Set the CST bit of the timer start register (TSTR) to 1 to start the count.

Phase counting mode

Select phase counting mode

Start counting

Phase counting mode

Figure 12.29 Procedure for Selecting the Phase Counting Mode

Phase Counting Operation Examples: The phase counting mode uses the phase difference

between two external clocks to increment/decrement the TCNT counter. There are 4 modes,

depending on the count conditions.

Phase Counting Mode 1: Figure 12.30 shows an example of phase counting mode 1 operation.

Table 12.9 lists the up counting and down counting conditions for the TCNT.

SH7041A 데이터시트(PDF) 380 Page - Renesas Technology Corp