SH7041A datasheet(385/923 Pages) RENESAS

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SH7041A 데이터시트(PDF) 385 Page - Renesas Technology Corp

부품명	SH7041A

상세설명	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

Scroll/Zoom	100%

제조업체	RENESAS [Renesas Technology Corp]

홈페이지	http://www.renesas.com

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385 / 923 page

347

input clock is used as the TGR0B register input capture source, and a pulse width of four times the

2-phase encoder pulse is detected.

The channel 1 TGR1A and TGR1B registers are set for the input capture function, the channel 0

TGR0A and TGR0C register compare-match is used as an input capture source, and all of the

control period increment and decrement values are stored.

TCLKA

TCLKB

Edge

detection

circuit

TCNT1

TCNT0

TGR1A (speed

period capture)

TGR0A (speed

control period)

TGR0C (position

control period)

TGR0B (pulse

width capture)

TGR0D (buffer

operation)

TGR1B (position

period capture)

Channel 0

Channel 1

–

Figure 12.34 Phase Count Mode Application Example

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