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SH7041A 데이터시트(PDF) 434 Page - Renesas Technology Corp

부품명 SH7041A
상세설명  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
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제조업체  RENESAS [Renesas Technology Corp]
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12.7.8
Contention between Buffer Register Write and Input Capture
If an input capture signal is issued in the T
2 state of the buffer write cycle, write to the buffer
register does not occur, and buffer operation takes priority (figure 12.83).
TGR
Input capture
signal
TCNT
Address
Write signal
Buffer
register
φ
T1
T2
Buffer register write cycle
Buffer register
address
N
MN
M
Figure 12.83 Buffer Register Write and Input Capture Contention



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