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SH7041A 데이터시트(PDF) 576 Page - Renesas Technology Corp |
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SH7041A 데이터시트(HTML) 576 Page - Renesas Technology Corp |
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576 / 923 page ![]() 538 15.1.2 Block Diagram Figure 15.1 is the block diagram of the high speed A/D converter. + − AVcc AVref* AVss AN0 AN1 AN2 AN3 AN4 AN5 AN6 ADTRG AN7 D/A conversion circuit S&H A S&H B ADDRA ADDRB ADDRC ADDRD ADDRE ADDRF ADDRG ADDRH ADCR ADCSR Internal data bus Bus I/F Interrupt signal ADI 8-bit timer or MTU conversion start trigger CMP ADCR: ADSCR: ADDRA: ADDRB: ADDRC: ADDRD: A/D control register A/D control status register A/D data register A A/D data register B A/D data register C A/D data register D CMP: S&H: ADDRE: ADDRF: ADDRG: ADDRH: Comparator array Sample and hold circuit A/D data register E A/D data register F A/D data register G A/D data register H Note: * SH7043 only Figure 15.1 High Speed A/D Converter Block Diagram 15.1.3 Pin Configuration Table 15.1 shows the input pins used by the high speed A/D converter. The AVcc and AVss pins are for the A/D converter internal analog section power supply. The AV ref pin is for the A/D conversion standard voltage. |
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